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05076
PLCDA03
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PLCDA24
ULTRA LOW CAPACITANCE TVS ARRAY
APPLICATIONS
Ethernet - 10/100 Base T FireWire, SCSI & USB Audio/Video Inputs xDSL Interfaces Cellular Phone Terminals
IEC COMPATIBILITY (EN61000-4)
61000-4-2 (ESD): Air - 15kV, Contact - 8kV 61000-4-4 (EFT): 40A - 5/50ns 61000-4-5 (Surge): 24A, 8/20s - Level 2(Line-Gnd) & Level 3(Line-Line)
SO-8
FEATURES
500 Watts Peak Pulse Power per Line (tp=8/20s) Bidirectional Configuration Available in Multiple Voltage Types Ranging From 3V to 24V Protects Two (2) Lines ESD Protection > 40 kilovolts Ultra Low Capacitance: 5pF RoHS Compliant
MECHANICAL CHARACTERISTICS
Molded JEDEC SO-8 Weight 70 milligrams (Approximate) Available in Lead-Free Pure-Tin Plating(Annealed) Solder Reflow Temperature: Pure-Tin - Sn, 100: 260-270C Consult Factory for Leaded Device Availability Flammability Rating UL 94V-0 12mm Tape and Reel Per EIA Standard 481 Marking: Marking Code, Logo, Date Code & Pin One Defined By Dot on Top of Package
PIN CONFIGURATION
8
7
6
5
1
2
3
4
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DEVICE CHARACTERISTICS
MAXIMUM RATINGS @ 25C Unless Otherwise Specified
PARAMETER
Peak Pulse Power (tp = 8/20s) - See Figure 1 Operating Temperature Storage Temperature
SYMBOL
PPP TL TSTG
VALUE
500 -55 to 150 -55 to 150
UNITS
Watts C C
ELECTRICAL CHARACTERISTICS PER LINE
PART NUMBER (See Notes 1) DEVICE MARKING RATED STAND-OFF VOLTAGE MINIMUM BREAKDOWN VOLTAGE
@ 25C Unless Otherwise Specified MAXIMUM CLAMPING VOLTAGE (See Fig. 2) MAXIMUM LEAKAGE CURRENT MAXIMUM CAPACITANCE (See Note 2)
MAXIMUM CLAMPING VOLTAGE (See Fig. 2) @ IP = 1A VC VOLTS
V WM VOLTS
@ 1mA V(BR) VOLTS
@8/20s VC @ IPP
@VWM ID A
@0V, 1 MHz C pF
PLCDA03 PLCDA05 PLCDA08 PLCDA12 PLCDA15 PLCDA24
SGA SGB SGF SGC SGD SGE
3.3 5.0 8.0 12.0 15.0 24.0
4.5 6.0 8.5 13.3 16.7 26.7
7.0 9.8 13.4 19.0 24.0 43.0
10.9V @ 43.0A 13.5V @ 42.0A 16.0V @ 34.0A 25.9V @ 21.0A 30.0V @ 17.0A 49.0V @ 12.0A
125 20 10 1 1 1
5 5 5 5 5 5
Note 1: Devices are designed to be used in parallel (See Circuit Diagram). For other applications, contact the factory. Do not apply surge in the "forward" direction of the TVS. Note 2: Do not surge from pins 8 to 1, 2 to 7, 6 to 3 and 4 to 5. PIV typically greater than 100V for each rectifier die. Electrical characteristics apply to pins 1 to 8, 7 to 2, 3 to 6 and 5 to 4.
10,000
PPP - Peak Pulse Power - Watts
FIGURE 1 PEAK PULSE POWER VS PULSE TIME
IPP - Peak Pulse Current - % of IPP
120 100 80 60 40 20 0 tf
FIGURE 2 PULSE WAVE FORM
Peak Value IPP TEST WAVEFORM PARAMETERS tf = 8s td = 20s
1,000
500W 8/20s Waveform
e-t
100
td = t I /2 PP
10 0.1
1
10 100 td - Pulse Duration - s
1,000
10,000
0
5
10
15 t - Time - s
20
25
30
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GRAPHS
FIGURE 3 POWER DERATING CURVE
100 80
% Of Rated Power
FIGURE 4 OVERSHOOT & CLAMPING VOLTAGE FOR PLCDA05
40
Peak Pulse Power 8/20s
5 Volts per Division
30
60
20
40 20 Average Power 0 0 25 50 75 100 125 TL - Lead Temperature - C 150
10
0 ESD Test Pulse: 25 kilovolt, 1/30ns (waveshape)
FIGURE 5 TYPICAL CLAMPING VOLTAGE VS PEAK PULSE CURRENT FOR PLCDA15
VC - Clamping Voltage - Volts
30
20
10
0 0 2 4 6 8 IPP - Peak Pulse Current - Amps 10 12
FIGURE 6 INSERTION LOSS - PLCDA05
FIGURE 7 RETURN LOSS - PLCDA05
20 db
10 db per Division 10 db per Division
20 db
Ref 0 db
Ref 0 db
-20 db
-20 db
-50 db 100 MHz per Division
-50 db 100 MHz per Division
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PLCDA24
APPLICATION NOTE
The PLCDA Series are low capacitance, bidirectional TVS arrays that are designed to protect I/O or high speed data lines from the damaging effects of ESD or EFT. This product series has a surge capability of 500 Watts PPP per line for an 8/20s waveshape and offers ESD protection > 40kv. BIDIRECTIONAL COMMON-MODE CONFIGURATION (Figure 1) Ideal for use in USB applications, the PLCDA Series provides up to two (2) lines of protection in a common-mode configuration as depicted in Figure 1. Circuit connectivity is as follows: Pins 1 & 2 and 3 & 4 are connected to Ground Pins 5 and 6 are connected to I/O Line D+ Pins 7 and 8 are connected to I/O Line D-
Figure 1. Typical Common-Mode USB Protection Circuit
D+
CIRCUIT BOARD LAYOUT RECOMMENDATIONS
D-
USB IC
Circuit board layout is critical for Electromagnetic Compatibility (EMC) protection. The following guidelines are recommended: The protection device should be placed near the input terminals or connectors, the device will divert the transient current immediately before it can be coupled into the nearby traces. The path length between the TVS device and the protected line should be minimized. All conductive loops including power and ground loops should be minimized. The transient current return path to ground should be kept as short as possible to reduce parasitic inductance. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias.
8
7
6
5
GND

1
2
3
4
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PLCDA24
SO-8 PACKAGE OUTLINE & DIMENSIONS
PACKAGE OUTLINE
-A-
SO-8
8
5 -B - P
+ 0.010 (0.25 MM) M B M 4 PL
DIM A B C D F G J K P R
NOTES 1. 2. 3. 4. 5. 6.
PACKAGE DIMENSIONS MILLIMETERS MIN MAX 4.80 3.80 1.35 0.35 0.40 1.27 BSC 0.18 0.10 5.80 0.25 INCHES MIN MAX
1
4
G
D C R x 45 0 - 10
K 0.010 (0.25 MM) M T B S A S 8 PL
-T-
+
J
F
0.196 5.00 0.189 0.150 0.157 4.00 1.75 0.054 0.068 0.49 0.014 0.019 0.049 1.250 0.016 1.27 BSC 0.05 BSC 0.05 BSC 0.25 0.007 0.009 0.004 0.008 0.25 6.20 0.229 0.244 0.019 0.50 0.010
MOUNTING PAD
0.050 0.005 0.030 0.005
- T - = Seating Plane and Datum Surface. Dimensions "A" and "B" are Datum. Dimensions "A" and "B" do not include mold protrusion. Maximum mold protrusion is 0.015" (0.380 mm) per side. Dimensioning and tolerances per ANSI Y14.5M, 1982. Dimensions are exclusive of mold flash and metal burrs.
TAPE & REEL/BULK ORDERING NOMENCLATURE
1. Surface mount product is taped and reeled in accordance with EIA-481. 2. Suffix-T7 = 7 Inch Reel - 1,000 pieces per 12mm tape, i.e. PLCDA05-T7. 3. Suffix-T13 = 13 Inch Reel - 2,500 pieces per 12mm tape, i.e., PLCDA05-T13. 4. Suffix - LF = Lead-Free, Pure-Tin Plating, i.e., PLCDA05-LF-T7. 5. No Suffix = Product Shipped in Tubes of 98 pcs per Tube.
0.160 0.005
0.245 MIN
0.045 0.005
COPYRIGHT (c) ProTek Devices 2007 SPECIFICATIONS: ProTek reserves the right to change the electrical and or mechanical characteristics described herein without notice (except JEDEC). DESIGN CHANGES: ProTek reserves the right to discontinue product lines without notice, and that the final judgement concerning selection and specifications is the buyer's and that in furnishing engineering and technical assistance, ProTek assumes no responsibility with respect to the selection or specifications of such products.
ProTek Devices 2929 South Fair Lane, Tempe, AZ 85282 Tel: 602-431-8101 Fax: 602-431-2288 E-Mail: sales@protekdevices.com Web Site: www.protekdevices.com
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